The Chip Multiprocessors (CMPs) architecture moves from multi-core to many-core architecture to\nprovide higher computing performance, and more reliable systems. Moreover, the CMPs trend also\nmove from 2D CMPs to 3D CMPs architecture in order to obtain higher performance, more reliability,\nreduced cache access latency, and increased cache bandwidth when compared with 2D CMPs.\nTherefore, in this work we present a 3D many-core CMP architecture which executes heavy loaded\ntasks in order to improve the system performance. However, executing heavy loaded tasks demands\nincreasing in system power consumption which results in increasing the on-chip thermal hotspots. The\nthermal hotspots in the 3D many-core CMPs cause performance degradation, reducing reliability,\ndecreasing the chip life spam. Therefore, Runtime Thermal Management (RTM) in the 3D many-core\nCMPs has become crucial to control the thermal hotspots without any performance degradation. In\nthis paper, a new runtime task migration technique is proposed to control hotspots in the 3D manycore\nCMPs. The proposed technique migrates the hottest tile with the optimal coldest tile in the core\nlayer. The optimal coldest tileis selected by considering theDynamic Random Access Memory\n(DRAM) banks' access distribution level in the cache layer. The simulation results indicate up to 33\n\n(on average 13)\nreduction in the cores' temperature of the target 3D many-core CMP. Moreover, the\nproposed technique efficiency is clarified in the simulation results that the maximum temperature of\ncores in the core and cache layers are both less than the maximum temperature limit, 80.
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